msm: npu: Support multiple commands concurrently
This change is to allow multiple commands to be sent to fw concurrently. It will get ipc queue info via get_property api and utilize NPU fully allowing application to execute multiple commands per network. Change-Id: Ice8e5d00b1adb434193486cf01a649a7e6904988 Signed-off-by: Da Hoon Pyun <dpyun@codeaurora.org>
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@ -343,5 +343,5 @@ void disable_fw(struct npu_device *npu_dev);
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int load_fw(struct npu_device *npu_dev);
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int unload_fw(struct npu_device *npu_dev);
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int npu_set_bw(struct npu_device *npu_dev, int new_ib, int new_ab);
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int npu_process_kevent(struct npu_client *client, struct npu_kevent *kevt);
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#endif /* _NPU_COMMON_H */
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@ -1327,28 +1327,6 @@ static int npu_exec_network_v2(struct npu_client *client,
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return ret;
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}
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static int npu_process_kevent(struct npu_kevent *kevt)
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{
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int ret = 0;
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switch (kevt->evt.type) {
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case MSM_NPU_EVENT_TYPE_EXEC_V2_DONE:
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ret = copy_to_user((void __user *)kevt->reserved[1],
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(void *)&kevt->reserved[0],
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kevt->evt.u.exec_v2_done.stats_buf_size);
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if (ret) {
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NPU_ERR("fail to copy to user\n");
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kevt->evt.u.exec_v2_done.stats_buf_size = 0;
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ret = -EFAULT;
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}
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break;
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default:
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break;
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}
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return ret;
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}
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static int npu_receive_event(struct npu_client *client,
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unsigned long arg)
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{
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@ -1364,7 +1342,7 @@ static int npu_receive_event(struct npu_client *client,
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kevt = list_first_entry(&client->evt_list,
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struct npu_kevent, list);
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list_del(&kevt->list);
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npu_process_kevent(kevt);
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npu_process_kevent(client, kevt);
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ret = copy_to_user(argp, &kevt->evt,
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sizeof(struct msm_npu_event));
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if (ret) {
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@ -1480,6 +1458,21 @@ static int npu_get_property(struct npu_client *client,
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case MSM_NPU_PROP_ID_HARDWARE_VERSION:
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prop.prop_param[0] = npu_dev->hw_version;
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break;
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case MSM_NPU_PROP_ID_IPC_QUEUE_INFO:
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ret = npu_host_get_ipc_queue_size(npu_dev,
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prop.prop_param[0]);
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if (ret < 0) {
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NPU_ERR("Can't get ipc queue %d size\n",
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prop.prop_param[0]);
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return ret;
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}
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prop.prop_param[1] = ret;
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break;
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case MSM_NPU_PROP_ID_DRV_FEATURE:
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prop.prop_param[0] = MSM_NPU_FEATURE_MULTI_EXECUTE |
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MSM_NPU_FEATURE_ASYNC_EXECUTE;
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break;
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default:
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ret = npu_host_get_fw_property(client->npu_dev, &prop);
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if (ret) {
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@ -418,3 +418,13 @@ int npu_host_ipc_post_init(struct npu_device *npu_dev)
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{
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return 0;
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}
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int npu_host_get_ipc_queue_size(struct npu_device *npu_dev, uint32_t q_idx)
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{
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if (q_idx >= ARRAY_SIZE(npu_q_setup)) {
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NPU_ERR("Invalid ipc queue index %d\n", q_idx);
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return -EINVAL;
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}
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return npu_q_setup[q_idx].size;
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}
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File diff suppressed because it is too large
Load Diff
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@ -43,6 +43,33 @@
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* Data Structures
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* -------------------------------------------------------------------------
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*/
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struct npu_network_cmd {
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struct list_head list;
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uint32_t cmd_type;
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uint32_t cmd_id;
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uint32_t trans_id;
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bool async;
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struct completion cmd_done;
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/* stats buf info */
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uint32_t stats_buf_size;
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void __user *stats_buf_u;
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void *stats_buf;
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int ret_status;
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};
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struct npu_misc_cmd {
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struct list_head list;
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uint32_t cmd_type;
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uint32_t trans_id;
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union {
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struct msm_npu_property prop;
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uint32_t data[32];
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} u;
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struct completion cmd_done;
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int ret_status;
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};
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struct npu_network {
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uint64_t id;
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int buf_hdl;
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@ -54,19 +81,13 @@ struct npu_network {
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uint32_t cur_perf_mode;
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uint32_t init_perf_mode;
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uint32_t num_layers;
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void *stats_buf;
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void __user *stats_buf_u;
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uint32_t stats_buf_size;
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uint32_t trans_id;
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atomic_t ref_cnt;
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bool is_valid;
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bool is_active;
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bool fw_error;
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bool cmd_pending;
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bool cmd_async;
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int cmd_ret_status;
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struct completion cmd_done;
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bool is_async;
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struct npu_client *client;
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struct list_head cmd_list;
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};
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enum fw_state {
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@ -91,14 +112,15 @@ struct npu_host_ctx {
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struct delayed_work disable_fw_work;
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struct workqueue_struct *wq;
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struct workqueue_struct *wq_pri;
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struct completion misc_cmd_done;
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struct completion fw_deinit_done;
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struct completion fw_bringup_done;
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struct completion fw_shutdown_done;
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struct completion npu_power_up_done;
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void *prop_buf;
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int32_t network_num;
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struct npu_network networks[MAX_LOADED_NETWORK];
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struct kmem_cache *network_cmd_cache;
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struct kmem_cache *misc_cmd_cache;
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struct kmem_cache *stats_buf_cache;
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bool sys_cache_disable;
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bool auto_pil_disable;
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uint32_t fw_dbg_mode;
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@ -110,13 +132,12 @@ struct npu_host_ctx {
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uint32_t wdg_irq_sts;
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bool fw_error;
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bool cancel_work;
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bool misc_cmd_pending;
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uint32_t misc_cmd_result;
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struct notifier_block nb;
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void *notif_hdle;
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spinlock_t bridge_mbox_lock;
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bool bridge_mbox_pwr_on;
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void *ipc_msg_buf;
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struct list_head misc_cmd_list;
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};
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struct npu_device;
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@ -136,6 +157,7 @@ int npu_host_ipc_send_cmd(struct npu_device *npu_dev, uint32_t queueIndex,
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void *pCmd);
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int npu_host_ipc_read_msg(struct npu_device *npu_dev, uint32_t queueIndex,
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uint32_t *pMsg);
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int npu_host_get_ipc_queue_size(struct npu_device *npu_dev, uint32_t q_idx);
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int32_t npu_host_get_info(struct npu_device *npu_dev,
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struct msm_npu_get_info_ioctl *get_info_ioctl);
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@ -73,6 +73,8 @@
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#define MSM_NPU_PROP_ID_PERF_MODE_MAX (MSM_NPU_PROP_ID_START + 2)
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#define MSM_NPU_PROP_ID_DRV_VERSION (MSM_NPU_PROP_ID_START + 3)
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#define MSM_NPU_PROP_ID_HARDWARE_VERSION (MSM_NPU_PROP_ID_START + 4)
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#define MSM_NPU_PROP_ID_IPC_QUEUE_INFO (MSM_NPU_PROP_ID_START + 5)
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#define MSM_NPU_PROP_ID_DRV_FEATURE (MSM_NPU_PROP_ID_START + 6)
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#define MSM_NPU_FW_PROP_ID_START 0x1000
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#define MSM_NPU_PROP_ID_DCVS_MODE (MSM_NPU_FW_PROP_ID_START + 0)
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@ -81,6 +83,9 @@
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#define MSM_NPU_PROP_ID_HW_VERSION (MSM_NPU_FW_PROP_ID_START + 3)
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#define MSM_NPU_PROP_ID_FW_VERSION (MSM_NPU_FW_PROP_ID_START + 4)
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/* features supported by driver */
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#define MSM_NPU_FEATURE_MULTI_EXECUTE 0x1
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#define MSM_NPU_FEATURE_ASYNC_EXECUTE 0x2
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#define PROP_PARAM_MAX_SIZE 8
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