Commit Graph

3 Commits

Author SHA1 Message Date
Elliott Hughes 7e82c0037b riscv64: fix mips-ism.
r29 is the stack pointer on mips, but it's x2 on riscv64 (and the git
history shows that this was indeed copy & pasted from the mips code)
and since bionic always sets up a signal stack with sigaltstack() I
doubt the comment was relevant even on mips (but no-one ever used it,
so who'd know?).

While I'm here, stop using decimal arithmetic --- the whole point was to
have each register contain the value that was obviously appropriate for
that register. (riscv64's mips-like mess of registers all over the place
means that's not going to be super readable, but there's no reason to
make it worse.)

Also, even though I personally prefer the 0xdead from the old mips code,
everyone else is using 0xa5a5, so let's make riscv64 match the others.

Test: treehugger
Change-Id: Ibbae821bc0a02e07164147d621e342224528c2c9
2023-03-20 16:08:15 -07:00
Elliott Hughes d284414786 Fix riscv64's crash glue.
When this was translated to riscv64, someone "fixed" the crashing bugs
that were the whole point of these two functions. Fix them back so they
actually crash, and add the CFI directives.

Test: treehugger
Change-Id: I312c51fa4c893d27b0f4e39383521657a5870a0d
2023-03-17 00:42:15 +00:00
Xia Lifang b13a10bb5d Add riscv64 support for debuggerd/crasher
Signed-off-by: Xia Lifang <lifang_xia@linux.alibaba.com>
Signed-off-by: Mao Han <han_mao@linux.alibaba.com>
Change-Id: I521c6da61cf2f6f67a73febf368068c430d94cdb
2022-10-12 22:30:27 +00:00