am df2f5a07: am d55f0adf: Qualify the source argument of atomic loads as a const pointer.
Merge commit 'df2f5a07aecac7be4ac2d1100668a0396fd256e7' * commit 'df2f5a07aecac7be4ac2d1100668a0396fd256e7': Qualify the source argument of atomic loads as a const pointer.
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commit
a417657880
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@ -65,14 +65,14 @@ extern inline void android_memory_store_barrier(void)
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}
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#endif
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extern inline int32_t android_atomic_acquire_load(volatile int32_t *ptr)
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extern inline int32_t android_atomic_acquire_load(volatile const int32_t *ptr)
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{
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int32_t value = *ptr;
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android_memory_barrier();
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return value;
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}
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extern inline int32_t android_atomic_release_load(volatile int32_t *ptr)
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extern inline int32_t android_atomic_release_load(volatile const int32_t *ptr)
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{
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android_memory_barrier();
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return *ptr;
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@ -212,11 +212,13 @@ extern inline int32_t android_atomic_add(int32_t increment,
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}
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#endif
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extern inline int32_t android_atomic_inc(volatile int32_t *addr) {
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extern inline int32_t android_atomic_inc(volatile int32_t *addr)
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{
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return android_atomic_add(1, addr);
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}
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extern inline int32_t android_atomic_dec(volatile int32_t *addr) {
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extern inline int32_t android_atomic_dec(volatile int32_t *addr)
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{
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return android_atomic_add(-1, addr);
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}
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@ -44,25 +44,29 @@ extern inline void android_memory_store_barrier(void)
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}
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#endif
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extern inline int32_t android_atomic_acquire_load(volatile int32_t *ptr) {
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extern inline int32_t android_atomic_acquire_load(volatile const int32_t *ptr)
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{
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int32_t value = *ptr;
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android_compiler_barrier();
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return value;
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}
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extern inline int32_t android_atomic_release_load(volatile int32_t *ptr) {
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extern inline int32_t android_atomic_release_load(volatile const int32_t *ptr)
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{
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android_memory_barrier();
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return *ptr;
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}
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extern inline void android_atomic_acquire_store(int32_t value,
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volatile int32_t *ptr) {
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volatile int32_t *ptr)
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{
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*ptr = value;
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android_memory_barrier();
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}
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extern inline void android_atomic_release_store(int32_t value,
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volatile int32_t *ptr) {
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volatile int32_t *ptr)
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{
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android_compiler_barrier();
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*ptr = value;
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}
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@ -115,11 +119,13 @@ extern inline int32_t android_atomic_add(int32_t increment,
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return increment;
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}
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extern inline int32_t android_atomic_inc(volatile int32_t *addr) {
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extern inline int32_t android_atomic_inc(volatile int32_t *addr)
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{
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return android_atomic_add(1, addr);
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}
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extern inline int32_t android_atomic_dec(volatile int32_t *addr) {
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extern inline int32_t android_atomic_dec(volatile int32_t *addr)
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{
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return android_atomic_add(-1, addr);
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}
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@ -77,8 +77,8 @@ int32_t android_atomic_or(int32_t value, volatile int32_t* addr);
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* This is only necessary if you need the memory barrier. A 32-bit read
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* from a 32-bit aligned address is atomic on all supported platforms.
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*/
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int32_t android_atomic_acquire_load(volatile int32_t* addr);
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int32_t android_atomic_release_load(volatile int32_t* addr);
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int32_t android_atomic_acquire_load(volatile const int32_t* addr);
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int32_t android_atomic_release_load(volatile const int32_t* addr);
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/*
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* Perform an atomic store with "acquire" or "release" ordering.
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@ -49,12 +49,12 @@ static pthread_mutex_t _swap_locks[SWAP_LOCK_COUNT];
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&_swap_locks[((unsigned)(void*)(addr) >> 3U) % SWAP_LOCK_COUNT]
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int32_t android_atomic_acquire_load(volatile int32_t* addr)
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int32_t android_atomic_acquire_load(volatile const int32_t* addr)
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{
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return *addr;
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}
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int32_t android_atomic_release_load(volatile int32_t* addr)
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int32_t android_atomic_release_load(volatile const int32_t* addr)
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{
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return *addr;
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}
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