2017-02-01 23:44:40 +00:00
|
|
|
/*
|
|
|
|
* Copyright (C) 2016 The Android Open Source Project
|
|
|
|
*
|
|
|
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
|
|
|
* you may not use this file except in compliance with the License.
|
|
|
|
* You may obtain a copy of the License at
|
|
|
|
*
|
|
|
|
* http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
*
|
|
|
|
* Unless required by applicable law or agreed to in writing, software
|
|
|
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
|
|
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
|
|
* See the License for the specific language governing permissions and
|
|
|
|
* limitations under the License.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <elf.h>
|
|
|
|
|
|
|
|
#include <gtest/gtest.h>
|
|
|
|
|
|
|
|
#include <vector>
|
|
|
|
|
2018-02-09 03:27:47 +00:00
|
|
|
#include <unwindstack/MachineArm.h>
|
2017-12-01 02:56:01 +00:00
|
|
|
#include <unwindstack/RegsArm.h>
|
2017-07-14 17:37:19 +00:00
|
|
|
|
2017-02-01 23:44:40 +00:00
|
|
|
#include "ElfInterfaceArm.h"
|
|
|
|
|
2017-10-19 23:08:58 +00:00
|
|
|
#include "ElfFake.h"
|
2017-02-01 23:44:40 +00:00
|
|
|
#include "MemoryFake.h"
|
|
|
|
|
2017-07-14 17:37:19 +00:00
|
|
|
namespace unwindstack {
|
|
|
|
|
2017-02-01 23:44:40 +00:00
|
|
|
class ElfInterfaceArmTest : public ::testing::Test {
|
|
|
|
protected:
|
|
|
|
void SetUp() override {
|
|
|
|
memory_.Clear();
|
|
|
|
process_memory_.Clear();
|
|
|
|
}
|
|
|
|
|
|
|
|
MemoryFake memory_;
|
|
|
|
MemoryFake process_memory_;
|
|
|
|
};
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, GetPrel32Addr) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x230000);
|
|
|
|
|
|
|
|
uint32_t value;
|
|
|
|
ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
|
|
|
|
ASSERT_EQ(0x231000U, value);
|
|
|
|
|
|
|
|
memory_.SetData32(0x1000, 0x80001000);
|
|
|
|
ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
|
|
|
|
ASSERT_EQ(0x2000U, value);
|
|
|
|
|
|
|
|
memory_.SetData32(0x1000, 0x70001000);
|
|
|
|
ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
|
|
|
|
ASSERT_EQ(0xf0002000U, value);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_start_zero) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0);
|
|
|
|
interface.FakeSetTotalEntries(10);
|
2017-02-01 23:44:40 +00:00
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_no_entries) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x100);
|
|
|
|
interface.FakeSetTotalEntries(0);
|
2017-02-01 23:44:40 +00:00
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_no_valid_memory) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x100);
|
|
|
|
interface.FakeSetTotalEntries(2);
|
2017-02-01 23:44:40 +00:00
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_ip_before_first) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(1);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_single_entry_negative_value) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x8000);
|
|
|
|
interface.FakeSetTotalEntries(1);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x8000, 0x7fffff00);
|
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x7ff0, &entry_offset));
|
|
|
|
ASSERT_EQ(0x8000U, entry_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_two_entries) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(2);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
memory_.SetData32(0x1008, 0x7000);
|
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x7000, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1000U, entry_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_last_check_single_entry) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(1);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x7000, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1000U, entry_offset);
|
|
|
|
|
|
|
|
// To guarantee that we are using the cache on the second run,
|
|
|
|
// set the memory to a different value.
|
|
|
|
memory_.SetData32(0x1000, 0x8000);
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x7004, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1000U, entry_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_last_check_multiple_entries) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(2);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
memory_.SetData32(0x1008, 0x8000);
|
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x9008, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1008U, entry_offset);
|
|
|
|
|
|
|
|
// To guarantee that we are using the cache on the second run,
|
|
|
|
// set the memory to a different value.
|
|
|
|
memory_.SetData32(0x1000, 0x16000);
|
|
|
|
memory_.SetData32(0x1008, 0x18000);
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1008U, entry_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_multiple_entries_even) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(4);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
memory_.SetData32(0x1008, 0x7000);
|
|
|
|
memory_.SetData32(0x1010, 0x8000);
|
|
|
|
memory_.SetData32(0x1018, 0x9000);
|
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1010U, entry_offset);
|
|
|
|
|
|
|
|
// To guarantee that we are using the cache on the second run,
|
|
|
|
// set the memory to a different value.
|
|
|
|
memory_.SetData32(0x1000, 0x16000);
|
|
|
|
memory_.SetData32(0x1008, 0x17000);
|
|
|
|
memory_.SetData32(0x1010, 0x18000);
|
|
|
|
memory_.SetData32(0x1018, 0x19000);
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1010U, entry_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, FindEntry_multiple_entries_odd) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(5);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x5000);
|
|
|
|
memory_.SetData32(0x1008, 0x6000);
|
|
|
|
memory_.SetData32(0x1010, 0x7000);
|
|
|
|
memory_.SetData32(0x1018, 0x8000);
|
|
|
|
memory_.SetData32(0x1020, 0x9000);
|
|
|
|
|
|
|
|
uint64_t entry_offset;
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x8100, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1010U, entry_offset);
|
|
|
|
|
|
|
|
// To guarantee that we are using the cache on the second run,
|
|
|
|
// set the memory to a different value.
|
|
|
|
memory_.SetData32(0x1000, 0x15000);
|
|
|
|
memory_.SetData32(0x1008, 0x16000);
|
|
|
|
memory_.SetData32(0x1010, 0x17000);
|
|
|
|
memory_.SetData32(0x1018, 0x18000);
|
|
|
|
memory_.SetData32(0x1020, 0x19000);
|
|
|
|
ASSERT_TRUE(interface.FindEntry(0x8100, &entry_offset));
|
|
|
|
ASSERT_EQ(0x1010U, entry_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, iterate) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(5);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x5000);
|
|
|
|
memory_.SetData32(0x1008, 0x6000);
|
|
|
|
memory_.SetData32(0x1010, 0x7000);
|
|
|
|
memory_.SetData32(0x1018, 0x8000);
|
|
|
|
memory_.SetData32(0x1020, 0x9000);
|
|
|
|
|
|
|
|
std::vector<uint32_t> entries;
|
|
|
|
for (auto addr : interface) {
|
|
|
|
entries.push_back(addr);
|
|
|
|
}
|
|
|
|
ASSERT_EQ(5U, entries.size());
|
|
|
|
ASSERT_EQ(0x6000U, entries[0]);
|
|
|
|
ASSERT_EQ(0x7008U, entries[1]);
|
|
|
|
ASSERT_EQ(0x8010U, entries[2]);
|
|
|
|
ASSERT_EQ(0x9018U, entries[3]);
|
|
|
|
ASSERT_EQ(0xa020U, entries[4]);
|
|
|
|
|
|
|
|
// Make sure the iterate cached the entries.
|
|
|
|
memory_.SetData32(0x1000, 0x11000);
|
|
|
|
memory_.SetData32(0x1008, 0x12000);
|
|
|
|
memory_.SetData32(0x1010, 0x13000);
|
|
|
|
memory_.SetData32(0x1018, 0x14000);
|
|
|
|
memory_.SetData32(0x1020, 0x15000);
|
|
|
|
|
|
|
|
entries.clear();
|
|
|
|
for (auto addr : interface) {
|
|
|
|
entries.push_back(addr);
|
|
|
|
}
|
|
|
|
ASSERT_EQ(5U, entries.size());
|
|
|
|
ASSERT_EQ(0x6000U, entries[0]);
|
|
|
|
ASSERT_EQ(0x7008U, entries[1]);
|
|
|
|
ASSERT_EQ(0x8010U, entries[2]);
|
|
|
|
ASSERT_EQ(0x9018U, entries[3]);
|
|
|
|
ASSERT_EQ(0xa020U, entries[4]);
|
|
|
|
}
|
|
|
|
|
2018-06-29 23:30:55 +00:00
|
|
|
TEST_F(ElfInterfaceArmTest, HandleUnknownType_arm_exidx) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(100);
|
2017-02-01 23:44:40 +00:00
|
|
|
|
2018-06-29 23:30:55 +00:00
|
|
|
// Verify that if the type is not the one we want, we don't set the values.
|
|
|
|
interface.HandleUnknownType(0x70000000, 0x2000, 320);
|
2017-02-01 23:44:40 +00:00
|
|
|
ASSERT_EQ(0x1000U, interface.start_offset());
|
|
|
|
ASSERT_EQ(100U, interface.total_entries());
|
|
|
|
|
|
|
|
// Everything is correct and present.
|
2018-06-29 23:30:55 +00:00
|
|
|
interface.HandleUnknownType(0x70000001, 0x2000, 320);
|
2017-02-01 23:44:40 +00:00
|
|
|
ASSERT_EQ(0x2000U, interface.start_offset());
|
2018-06-29 23:30:55 +00:00
|
|
|
ASSERT_EQ(40U, interface.total_entries());
|
2017-02-01 23:44:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, StepExidx) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
2017-02-01 23:44:40 +00:00
|
|
|
|
|
|
|
// FindEntry fails.
|
2017-09-20 20:37:24 +00:00
|
|
|
bool finished;
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_FALSE(interface.StepExidx(0x7000, nullptr, nullptr, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
|
2017-02-01 23:44:40 +00:00
|
|
|
|
|
|
|
// ExtractEntry should fail.
|
2017-10-19 23:08:58 +00:00
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(2);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
memory_.SetData32(0x1008, 0x8000);
|
|
|
|
|
|
|
|
RegsArm regs;
|
|
|
|
regs[ARM_REG_SP] = 0x1000;
|
|
|
|
regs[ARM_REG_LR] = 0x20000;
|
|
|
|
regs.set_sp(regs[ARM_REG_SP]);
|
|
|
|
regs.set_pc(0x1234);
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_FALSE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_MEMORY_INVALID, interface.LastErrorCode());
|
|
|
|
EXPECT_EQ(0x1004U, interface.LastErrorAddress());
|
2017-02-01 23:44:40 +00:00
|
|
|
|
|
|
|
// Eval should fail.
|
|
|
|
memory_.SetData32(0x1004, 0x81000000);
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_FALSE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
|
2017-02-01 23:44:40 +00:00
|
|
|
|
|
|
|
// Everything should pass.
|
|
|
|
memory_.SetData32(0x1004, 0x80b0b0b0);
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
|
2017-09-20 20:37:24 +00:00
|
|
|
ASSERT_FALSE(finished);
|
2017-02-01 23:44:40 +00:00
|
|
|
ASSERT_EQ(0x1000U, regs.sp());
|
|
|
|
ASSERT_EQ(0x1000U, regs[ARM_REG_SP]);
|
|
|
|
ASSERT_EQ(0x20000U, regs.pc());
|
|
|
|
ASSERT_EQ(0x20000U, regs[ARM_REG_PC]);
|
2017-12-15 19:17:45 +00:00
|
|
|
|
|
|
|
// Load bias is non-zero.
|
2018-06-06 21:47:31 +00:00
|
|
|
interface.set_load_bias(0x1000);
|
|
|
|
ASSERT_TRUE(interface.StepExidx(0x8000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
|
2017-12-15 19:17:45 +00:00
|
|
|
|
|
|
|
// Pc too small.
|
2018-06-06 21:47:31 +00:00
|
|
|
interface.set_load_bias(0x9000);
|
|
|
|
ASSERT_FALSE(interface.StepExidx(0x8000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
|
2017-02-01 23:44:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, StepExidx_pc_set) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
2017-02-01 23:44:40 +00:00
|
|
|
|
2017-10-19 23:08:58 +00:00
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(2);
|
2017-02-01 23:44:40 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
memory_.SetData32(0x1004, 0x808800b0);
|
|
|
|
memory_.SetData32(0x1008, 0x8000);
|
|
|
|
process_memory_.SetData32(0x10000, 0x10);
|
|
|
|
|
|
|
|
RegsArm regs;
|
|
|
|
regs[ARM_REG_SP] = 0x10000;
|
|
|
|
regs[ARM_REG_LR] = 0x20000;
|
|
|
|
regs.set_sp(regs[ARM_REG_SP]);
|
|
|
|
regs.set_pc(0x1234);
|
|
|
|
|
|
|
|
// Everything should pass.
|
2017-09-20 20:37:24 +00:00
|
|
|
bool finished;
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
|
2017-09-20 20:37:24 +00:00
|
|
|
ASSERT_FALSE(finished);
|
2017-02-01 23:44:40 +00:00
|
|
|
ASSERT_EQ(0x10004U, regs.sp());
|
|
|
|
ASSERT_EQ(0x10004U, regs[ARM_REG_SP]);
|
|
|
|
ASSERT_EQ(0x10U, regs.pc());
|
|
|
|
ASSERT_EQ(0x10U, regs[ARM_REG_PC]);
|
|
|
|
}
|
2017-07-14 17:37:19 +00:00
|
|
|
|
2017-09-20 20:37:24 +00:00
|
|
|
TEST_F(ElfInterfaceArmTest, StepExidx_cant_unwind) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
2017-09-20 20:37:24 +00:00
|
|
|
|
2017-10-19 23:08:58 +00:00
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(1);
|
2017-09-20 20:37:24 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
memory_.SetData32(0x1004, 1);
|
|
|
|
|
|
|
|
RegsArm regs;
|
|
|
|
regs[ARM_REG_SP] = 0x10000;
|
|
|
|
regs[ARM_REG_LR] = 0x20000;
|
|
|
|
regs.set_sp(regs[ARM_REG_SP]);
|
|
|
|
regs.set_pc(0x1234);
|
|
|
|
|
|
|
|
bool finished;
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
|
2017-09-20 20:37:24 +00:00
|
|
|
ASSERT_TRUE(finished);
|
|
|
|
ASSERT_EQ(0x10000U, regs.sp());
|
|
|
|
ASSERT_EQ(0x10000U, regs[ARM_REG_SP]);
|
|
|
|
ASSERT_EQ(0x1234U, regs.pc());
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_F(ElfInterfaceArmTest, StepExidx_refuse_unwind) {
|
2017-10-19 23:08:58 +00:00
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
2017-09-20 20:37:24 +00:00
|
|
|
|
2017-10-19 23:08:58 +00:00
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(1);
|
2017-09-20 20:37:24 +00:00
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
memory_.SetData32(0x1004, 0x808000b0);
|
|
|
|
|
|
|
|
RegsArm regs;
|
|
|
|
regs[ARM_REG_SP] = 0x10000;
|
|
|
|
regs[ARM_REG_LR] = 0x20000;
|
|
|
|
regs.set_sp(regs[ARM_REG_SP]);
|
|
|
|
regs.set_pc(0x1234);
|
|
|
|
|
|
|
|
bool finished;
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
|
2017-09-20 20:37:24 +00:00
|
|
|
ASSERT_TRUE(finished);
|
|
|
|
ASSERT_EQ(0x10000U, regs.sp());
|
|
|
|
ASSERT_EQ(0x10000U, regs[ARM_REG_SP]);
|
|
|
|
ASSERT_EQ(0x1234U, regs.pc());
|
|
|
|
}
|
|
|
|
|
2017-10-23 20:51:54 +00:00
|
|
|
TEST_F(ElfInterfaceArmTest, StepExidx_pc_zero) {
|
|
|
|
ElfInterfaceArmFake interface(&memory_);
|
|
|
|
|
|
|
|
interface.FakeSetStartOffset(0x1000);
|
|
|
|
interface.FakeSetTotalEntries(1);
|
|
|
|
memory_.SetData32(0x1000, 0x6000);
|
|
|
|
// Set the pc using a pop r15 command.
|
|
|
|
memory_.SetData32(0x1004, 0x808800b0);
|
|
|
|
|
|
|
|
// pc value of zero.
|
|
|
|
process_memory_.SetData32(0x10000, 0);
|
|
|
|
|
|
|
|
RegsArm regs;
|
|
|
|
regs[ARM_REG_SP] = 0x10000;
|
|
|
|
regs[ARM_REG_LR] = 0x20000;
|
|
|
|
regs.set_sp(regs[ARM_REG_SP]);
|
|
|
|
regs.set_pc(0x1234);
|
|
|
|
|
|
|
|
bool finished;
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
|
2017-10-23 20:51:54 +00:00
|
|
|
ASSERT_TRUE(finished);
|
|
|
|
ASSERT_EQ(0U, regs.pc());
|
|
|
|
|
|
|
|
// Now set the pc from the lr register (pop r14).
|
|
|
|
memory_.SetData32(0x1004, 0x808400b0);
|
|
|
|
|
|
|
|
regs[ARM_REG_SP] = 0x10000;
|
|
|
|
regs[ARM_REG_LR] = 0x20000;
|
|
|
|
regs.set_sp(regs[ARM_REG_SP]);
|
|
|
|
regs.set_pc(0x1234);
|
|
|
|
|
2018-06-06 21:47:31 +00:00
|
|
|
ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
|
2018-01-24 01:52:23 +00:00
|
|
|
EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
|
2017-10-23 20:51:54 +00:00
|
|
|
ASSERT_TRUE(finished);
|
|
|
|
ASSERT_EQ(0U, regs.pc());
|
|
|
|
}
|
|
|
|
|
2017-07-14 17:37:19 +00:00
|
|
|
} // namespace unwindstack
|