2008-10-21 14:00:00 +00:00
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/*
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* Copyright (C) 2007 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <cutils/atomic.h>
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2010-05-20 05:33:28 +00:00
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#include <cutils/atomic-inline.h>
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2008-10-21 14:00:00 +00:00
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#ifdef HAVE_WIN32_THREADS
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#include <windows.h>
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#else
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#include <sched.h>
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#endif
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/*****************************************************************************/
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#if defined(HAVE_MACOSX_IPC)
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#include <libkern/OSAtomic.h>
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2010-05-27 17:10:18 +00:00
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int32_t android_atomic_acquire_load(volatile int32_t* addr) {
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int32_t value = *addr;
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OSMemoryBarrier();
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return value;
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}
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int32_t android_atomic_release_load(volatile int32_t* addr) {
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OSMemoryBarrier();
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return *addr;
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}
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void android_atomic_acquire_store(int32_t value, volatile int32_t* addr) {
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*addr = value;
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OSMemoryBarrier();
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}
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void android_atomic_release_store(int32_t value, volatile int32_t* addr) {
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OSMemoryBarrier();
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*addr = value;
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2008-10-21 14:00:00 +00:00
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}
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int32_t android_atomic_inc(volatile int32_t* addr) {
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return OSAtomicIncrement32Barrier((int32_t*)addr)-1;
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}
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int32_t android_atomic_dec(volatile int32_t* addr) {
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return OSAtomicDecrement32Barrier((int32_t*)addr)+1;
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}
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int32_t android_atomic_add(int32_t value, volatile int32_t* addr) {
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return OSAtomicAdd32Barrier(value, (int32_t*)addr)-value;
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}
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int32_t android_atomic_and(int32_t value, volatile int32_t* addr) {
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2010-05-27 17:10:18 +00:00
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return OSAtomicAnd32OrigBarrier(value, (int32_t*)addr);
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2008-10-21 14:00:00 +00:00
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}
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int32_t android_atomic_or(int32_t value, volatile int32_t* addr) {
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2010-05-27 17:10:18 +00:00
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return OSAtomicOr32OrigBarrier(value, (int32_t*)addr);
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}
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int32_t android_atomic_acquire_swap(int32_t value, volatile int32_t* addr) {
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2008-10-21 14:00:00 +00:00
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int32_t oldValue;
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do {
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oldValue = *addr;
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2010-05-27 17:10:18 +00:00
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} while (android_atomic_acquire_cas(oldValue, value, addr));
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2008-10-21 14:00:00 +00:00
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return oldValue;
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}
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2010-05-27 17:10:18 +00:00
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int32_t android_atomic_release_swap(int32_t value, volatile int32_t* addr) {
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2008-10-21 14:00:00 +00:00
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int32_t oldValue;
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do {
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oldValue = *addr;
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2010-05-27 17:10:18 +00:00
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} while (android_atomic_release_cas(oldValue, value, addr));
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2008-10-21 14:00:00 +00:00
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return oldValue;
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}
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2010-05-27 17:10:18 +00:00
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int android_atomic_release_cas(int32_t oldvalue, int32_t newvalue, volatile int32_t* addr) {
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2010-05-20 05:33:28 +00:00
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/* OS X CAS returns zero on failure; invert to return zero on success */
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2008-10-21 14:00:00 +00:00
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return OSAtomicCompareAndSwap32Barrier(oldvalue, newvalue, (int32_t*)addr) == 0;
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}
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2010-05-27 17:10:18 +00:00
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int android_atomic_acquire_cas(int32_t oldvalue, int32_t newvalue,
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2010-05-20 05:33:28 +00:00
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volatile int32_t* addr) {
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int result = (OSAtomicCompareAndSwap32(oldvalue, newvalue, (int32_t*)addr) == 0);
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2010-05-27 17:10:18 +00:00
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if (result == 0) {
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2010-05-20 05:33:28 +00:00
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/* success, perform barrier */
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OSMemoryBarrier();
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}
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2010-05-27 17:10:18 +00:00
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return result;
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2008-10-21 14:00:00 +00:00
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}
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/*****************************************************************************/
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#elif defined(__i386__) || defined(__x86_64__)
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2010-05-27 17:10:18 +00:00
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int32_t android_atomic_acquire_load(volatile int32_t* addr) {
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int32_t value = *addr;
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ANDROID_MEMBAR_FULL();
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return value;
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}
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int32_t android_atomic_release_load(volatile int32_t* addr) {
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ANDROID_MEMBAR_FULL();
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return *addr;
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}
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void android_atomic_acquire_store(int32_t value, volatile int32_t* addr) {
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*addr = value;
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ANDROID_MEMBAR_FULL();
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}
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void android_atomic_release_store(int32_t value, volatile int32_t* addr) {
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ANDROID_MEMBAR_FULL();
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*addr = value;
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2008-10-21 14:00:00 +00:00
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}
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int32_t android_atomic_inc(volatile int32_t* addr) {
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2010-05-27 17:10:18 +00:00
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return android_atomic_add(1, addr);
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2008-10-21 14:00:00 +00:00
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}
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int32_t android_atomic_dec(volatile int32_t* addr) {
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2010-05-27 17:10:18 +00:00
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return android_atomic_add(-1, addr);
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2008-10-21 14:00:00 +00:00
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}
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int32_t android_atomic_add(int32_t value, volatile int32_t* addr) {
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int32_t oldValue;
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do {
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oldValue = *addr;
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2010-05-27 17:10:18 +00:00
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} while (android_atomic_release_cas(oldValue, oldValue+value, addr));
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2008-10-21 14:00:00 +00:00
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return oldValue;
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}
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int32_t android_atomic_and(int32_t value, volatile int32_t* addr) {
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int32_t oldValue;
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do {
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oldValue = *addr;
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2010-05-27 17:10:18 +00:00
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} while (android_atomic_release_cas(oldValue, oldValue&value, addr));
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2008-10-21 14:00:00 +00:00
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return oldValue;
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}
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int32_t android_atomic_or(int32_t value, volatile int32_t* addr) {
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int32_t oldValue;
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do {
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oldValue = *addr;
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2010-05-27 17:10:18 +00:00
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} while (android_atomic_release_cas(oldValue, oldValue|value, addr));
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2008-10-21 14:00:00 +00:00
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return oldValue;
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}
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2010-05-27 17:10:18 +00:00
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/* returns 0 on successful swap */
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static inline int cas(int32_t oldvalue, int32_t newvalue,
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volatile int32_t* addr) {
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2008-10-21 14:00:00 +00:00
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int xchg;
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asm volatile
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(
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" lock; cmpxchg %%ecx, (%%edx);"
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" setne %%al;"
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" andl $1, %%eax"
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: "=a" (xchg)
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: "a" (oldvalue), "c" (newvalue), "d" (addr)
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);
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return xchg;
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}
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2010-05-27 17:10:18 +00:00
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int32_t android_atomic_acquire_swap(int32_t value, volatile int32_t* addr) {
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int32_t oldValue;
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do {
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oldValue = *addr;
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} while (cas(oldValue, value, addr));
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ANDROID_MEMBAR_FULL();
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return oldValue;
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}
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int32_t android_atomic_release_swap(int32_t value, volatile int32_t* addr) {
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ANDROID_MEMBAR_FULL();
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int32_t oldValue;
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do {
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oldValue = *addr;
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} while (cas(oldValue, value, addr));
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return oldValue;
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}
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int android_atomic_acquire_cas(int32_t oldvalue, int32_t newvalue,
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volatile int32_t* addr) {
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int xchg = cas(oldvalue, newvalue, addr);
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if (xchg == 0)
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ANDROID_MEMBAR_FULL();
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return xchg;
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}
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int android_atomic_release_cas(int32_t oldvalue, int32_t newvalue,
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2010-05-20 05:33:28 +00:00
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volatile int32_t* addr) {
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2010-05-27 17:10:18 +00:00
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ANDROID_MEMBAR_FULL();
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int xchg = cas(oldvalue, newvalue, addr);
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2010-05-20 05:33:28 +00:00
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return xchg;
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2008-10-21 14:00:00 +00:00
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}
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2010-05-20 05:33:28 +00:00
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/*****************************************************************************/
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#elif __arm__
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// implementation for ARM is in atomic-android-arm.s.
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2008-10-21 14:00:00 +00:00
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2009-08-04 10:14:22 +00:00
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/*****************************************************************************/
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#elif __sh__
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// implementation for SuperH is in atomic-android-sh.c.
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2008-10-21 14:00:00 +00:00
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#else
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#error "Unsupported atomic operations for this platform"
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#endif
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