67 lines
2.2 KiB
ArmAsm
67 lines
2.2 KiB
ArmAsm
/*
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* Copyright 2022 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* https://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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//
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// Initial TTBR0 idmap activated before first memory write.
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// Remains active until a new page table is created by early Rust.
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//
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.set .SZ_1K, 1024
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.set .SZ_4K, 4 * .SZ_1K
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.set .SZ_1M, 1024 * .SZ_1K
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.set .SZ_2M, 2 * .SZ_1M
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.set .SZ_1G, 1024 * .SZ_1M
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.set .PAGE_SIZE, .SZ_4K
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.set .ORIGIN_ADDR, 2 * .SZ_1G
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.set .DTB_ADDR, .ORIGIN_ADDR + (0 * .SZ_2M)
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.set .TEXT_ADDR, .ORIGIN_ADDR + (1 * .SZ_2M)
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.set .DATA_ADDR, .ORIGIN_ADDR + (2 * .SZ_2M)
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.set .L_TT_TYPE_BLOCK, 0x1
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.set .L_TT_TYPE_PAGE, 0x3
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.set .L_TT_TYPE_TABLE, 0x3
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.set .L_TT_AF, 0x1 << 10 // Access flag
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.set .L_TT_NG, 0x1 << 11 // Not global
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.set .L_TT_RO, 0x2 << 6
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.set .L_TT_XN, 0x3 << 53
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.set .L_TT_MT_DEV, 0x0 << 2 // MAIR #0 (DEV_nGnRE)
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.set .L_TT_MT_MEM, (0x1 << 2) | (0x3 << 8) // MAIR #1 (MEM_WBWA), inner shareable
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.set .L_BLOCK_RO, .L_TT_TYPE_BLOCK | .L_TT_MT_MEM | .L_TT_AF | .L_TT_RO | .L_TT_XN
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.set .L_BLOCK_DEV, .L_TT_TYPE_BLOCK | .L_TT_MT_DEV | .L_TT_AF | .L_TT_XN
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.set .L_BLOCK_MEM, .L_TT_TYPE_BLOCK | .L_TT_MT_MEM | .L_TT_AF | .L_TT_XN | .L_TT_NG
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.set .L_BLOCK_MEM_XIP, .L_TT_TYPE_BLOCK | .L_TT_MT_MEM | .L_TT_AF | .L_TT_NG | .L_TT_RO
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.section ".rodata.idmap", "a", %progbits
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.global idmap
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.balign .PAGE_SIZE
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idmap:
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/* level 1 */
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.quad .L_BLOCK_DEV | 0x0 // 1 GiB of device mappings
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.quad 0x0 // 1 GiB unmapped
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.quad .L_TT_TYPE_TABLE + 0f // up to 1 GiB of DRAM
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.balign .PAGE_SIZE, 0 // unmapped
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/* level 2 */
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0: .quad .L_BLOCK_RO | .DTB_ADDR // DT provided by VMM
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.quad .L_BLOCK_MEM_XIP | .TEXT_ADDR // 2 MiB of DRAM containing image
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.quad .L_BLOCK_MEM | .DATA_ADDR // 2 MiB of writable DRAM
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.balign .PAGE_SIZE, 0 // unmapped
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