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android_packages_modules_Virtualization
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* it has maximum 8 (was 7) PCI interrupts
* base irq number starts from 4 (was 3) according to
  AARCH64_IRQ_BASE in external/crosvm/aarch64/src/lib.rs

Bug: 249054080
Test: TH
Change-Id: I2145a7ed97b92b6db1b975f5f0c87ff7b4ef8afe
This commit is contained in:
Jiyong Park 2023-03-21 19:27:04 +09:00
parent 9c63cd17b4
commit a503f424a0
1 changed files with 11 additions and 7 deletions
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18
pvmfw/platform.dts
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@ -8,6 +8,8 @@
#define PLACEHOLDER2 PLACEHOLDER PLACEHOLDER #define PLACEHOLDER2 PLACEHOLDER PLACEHOLDER
#define PLACEHOLDER4 PLACEHOLDER2 PLACEHOLDER2 #define PLACEHOLDER4 PLACEHOLDER2 PLACEHOLDER2
#define IRQ_BASE 4
/dts-v1/; /dts-v1/;
/ { / {
@ -214,13 +216,14 @@
bus-range = <0x00 0x00>; bus-range = <0x00 0x00>;
reg = <0x00 0x10000 0x00 0x1000000>; reg = <0x00 0x10000 0x00 0x1000000>;
interrupt-map = < interrupt-map = <
0x0800 0x0 0x0 1 &intc 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 0x0800 0x0 0x0 1 &intc 0 0 GIC_SPI (IRQ_BASE + 0) IRQ_TYPE_LEVEL_HIGH
0x1000 0x0 0x0 1 &intc 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH 0x1000 0x0 0x0 1 &intc 0 0 GIC_SPI (IRQ_BASE + 1) IRQ_TYPE_LEVEL_HIGH
0x1800 0x0 0x0 1 &intc 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0x1800 0x0 0x0 1 &intc 0 0 GIC_SPI (IRQ_BASE + 2) IRQ_TYPE_LEVEL_HIGH
0x2000 0x0 0x0 1 &intc 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0x2000 0x0 0x0 1 &intc 0 0 GIC_SPI (IRQ_BASE + 3) IRQ_TYPE_LEVEL_HIGH
0x2800 0x0 0x0 1 &intc 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0x2800 0x0 0x0 1 &intc 0 0 GIC_SPI (IRQ_BASE + 4) IRQ_TYPE_LEVEL_HIGH
0x3000 0x0 0x0 1 &intc 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0x3000 0x0 0x0 1 &intc 0 0 GIC_SPI (IRQ_BASE + 5) IRQ_TYPE_LEVEL_HIGH
0x3800 0x0 0x0 1 &intc 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0x3800 0x0 0x0 1 &intc 0 0 GIC_SPI (IRQ_BASE + 6) IRQ_TYPE_LEVEL_HIGH
0x4000 0x0 0x0 1 &intc 0 0 GIC_SPI (IRQ_BASE + 7) IRQ_TYPE_LEVEL_HIGH
>; >;
interrupt-map-mask = <0xf800 0x0 0x0 0x7 interrupt-map-mask = <0xf800 0x0 0x0 0x7
0xf800 0x0 0x0 0x7 0xf800 0x0 0x0 0x7
@ -228,6 +231,7 @@
0xf800 0x0 0x0 0x7 0xf800 0x0 0x0 0x7
0xf800 0x0 0x0 0x7 0xf800 0x0 0x0 0x7
0xf800 0x0 0x0 0x7 0xf800 0x0 0x0 0x7
0xf800 0x0 0x0 0x7
0xf800 0x0 0x0 0x7>; 0xf800 0x0 0x0 0x7>;
}; };