cc41f01490
[MIPS] Add support for MXU instructions for Ingenic builds.
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This enables an Ingenic build to use MXU asm instructions.
MXU support was just recently added:
ASM: https://android-review.googlesource.com/63701
GCC: https://android-review.googlesource.com/63702
BIN: https://android-review.googlesource.com/#/c/63704/
Change-Id: I2b60567a689efa70ec064dfbb0f241a6bc61aed1
Signed-off-by: Pete Delaney <piet.delaney@imgtec.com>
2013-08-15 18:32:12 -07:00
6faf71647a
Do not use -msynci flag for Xburst 4780 cores
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synci does not provide coherency between CPU's on this device
Change-Id: I10e73fa49859e55d018884c6682b5a00b887e0a1
Signed-off-by: Chris Dearman <chris.dearman@imgtec.com>
2013-06-20 13:29:49 -07:00
90ce453470
[MIPS] Disabled madd support for Ingenic Xburst CPUs.
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1. Added xburst ARCH_VARIANT file 'mips32r2-fp-xburst.mk'.
a) Added -mno-fused-madd GCC option.
2. Removing -mno-fused-madd GCC option for LLVM.
Change-Id: I947a74eb89c05ae321417533c3c40241abc6f965
Signed-off-by: Pete Delaney <piet.delaney@imgtec.com>
2013-05-20 15:27:20 -07:00
695fee31ad
For the current MIPS compiler __builtin___clear_cache() generates synci instruction only with -msynci option
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So, add -msynci to all mips32r2 makefiles. Also add msynci to the list flags not recognized by clang.
Change-Id: I48fd6f2b0cbe80c3cd90f453ced97a2f154f7ad3
Signed-off-by: Rocky Zhang <yan@mips.com>
2013-02-07 16:07:01 -08:00
06afc1c5ab
Support for MIPS Build targets.
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Change-Id: I14c27305298ce36d5c100abf25489275c2269c5f
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Raghu Gandham <raghu@mips.com>
2012-08-01 11:18:25 -07:00
Pete Delaney
Raghu Gandham
Raghu Gandham