diff --git a/libc/private/bionic_atomic_arm.h b/libc/private/bionic_atomic_arm.h
deleted file mode 100644
index 0cb832f97..000000000
--- a/libc/private/bionic_atomic_arm.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2011 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef BIONIC_ATOMIC_ARM_H
-#define BIONIC_ATOMIC_ARM_H
-
-__ATOMIC_INLINE__ void __bionic_memory_barrier() {
-  __asm__ __volatile__ ( "dmb ish" : : : "memory" );
-}
-
-/* Compare-and-swap, without any explicit barriers. Note that this function
- * returns 0 on success, and 1 on failure. The opposite convention is typically
- * used on other platforms.
- */
-__ATOMIC_INLINE__ int __bionic_cmpxchg(int32_t old_value, int32_t new_value, volatile int32_t* ptr) {
-  int32_t prev, status;
-  do {
-    __asm__ __volatile__ (
-          "ldrex %0, [%3]\n"
-          "mov %1, #0\n"
-          "teq %0, %4\n"
-#ifdef __thumb2__
-          "it eq\n"
-#endif
-          "strexeq %1, %5, [%3]"
-          : "=&r" (prev), "=&r" (status), "+m"(*ptr)
-          : "r" (ptr), "Ir" (old_value), "r" (new_value)
-          : "cc");
-  } while (__builtin_expect(status != 0, 0));
-  return prev != old_value;
-}
-
-/* Swap, without any explicit barriers. */
-__ATOMIC_INLINE__ int32_t __bionic_swap(int32_t new_value, volatile int32_t* ptr) {
-  int32_t prev, status;
-  do {
-    __asm__ __volatile__ (
-          "ldrex %0, [%3]\n"
-          "strex %1, %4, [%3]"
-          : "=&r" (prev), "=&r" (status), "+m" (*ptr)
-          : "r" (ptr), "r" (new_value)
-          : "cc");
-  } while (__builtin_expect(status != 0, 0));
-  return prev;
-}
-
-/* Atomic decrement, without explicit barriers. */
-__ATOMIC_INLINE__ int32_t __bionic_atomic_dec(volatile int32_t* ptr) {
-  int32_t prev, tmp, status;
-  do {
-    __asm__ __volatile__ (
-          "ldrex %0, [%4]\n"
-          "sub %1, %0, #1\n"
-          "strex %2, %1, [%4]"
-          : "=&r" (prev), "=&r" (tmp), "=&r" (status), "+m"(*ptr)
-          : "r" (ptr)
-          : "cc");
-  } while (__builtin_expect(status != 0, 0));
-  return prev;
-}
-
-#endif /* SYS_ATOMICS_ARM_H */
diff --git a/libc/private/bionic_atomic_arm64.h b/libc/private/bionic_atomic_arm64.h
deleted file mode 100644
index c3a34e18c..000000000
--- a/libc/private/bionic_atomic_arm64.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef BIONIC_ATOMIC_AARCH64_H
-#define BIONIC_ATOMIC_AARCH64_H
-
-/* For ARMv8, we can use the 'dmb' instruction directly */
-__ATOMIC_INLINE__ void __bionic_memory_barrier() {
-  __asm__ __volatile__ ( "dmb ish" : : : "memory" );
-}
-
-/* Compare-and-swap, without any explicit barriers. Note that this function
- * returns 0 on success, and 1 on failure. The opposite convention is typically
- * used on other platforms.
- */
-__ATOMIC_INLINE__ int __bionic_cmpxchg(int32_t old_value, int32_t new_value, volatile int32_t* ptr) {
-  int32_t tmp, oldval;
-  __asm__ __volatile__ (
-      "// atomic_cmpxchg\n"
-      "1:  ldxr %w1, [%3]\n"
-      "    cmp %w1, %w4\n"
-      "    b.ne 2f\n"
-      "    stxr %w0, %w5, [%3]\n"
-      "    cbnz  %w0, 1b\n"
-      "2:"
-      : "=&r" (tmp), "=&r" (oldval), "+o"(*ptr)
-      : "r" (ptr), "Ir" (old_value), "r" (new_value)
-      : "cc", "memory");
-  return oldval != old_value;
-}
-
-/* Swap, without any explicit barriers.  */
-__ATOMIC_INLINE__ int32_t __bionic_swap(int32_t new_value, volatile int32_t* ptr) {
-  int32_t prev, status;
-  __asm__ __volatile__ (
-      "// atomic_swap\n"
-      "1:  ldxr %w0, [%3]\n"
-      "    stxr %w1, %w4, [%3]\n"
-      "    cbnz %w1, 1b\n"
-      : "=&r" (prev), "=&r" (status), "+o" (*ptr)
-      : "r" (ptr), "r" (new_value)
-      : "cc", "memory");
-  return prev;
-}
-
-/* Atomic decrement, without explicit barriers.  */
-__ATOMIC_INLINE__ int32_t __bionic_atomic_dec(volatile int32_t* ptr) {
-  int32_t prev, tmp, status;
-  __asm__ __volatile__ (
-      "1:  ldxr %w0, [%4]\n"
-      "    sub %w1, %w0, #1\n"
-      "    stxr %w2, %w1, [%4]\n"
-      "    cbnz %w2, 1b"
-      : "=&r" (prev), "=&r" (tmp), "=&r" (status), "+m"(*ptr)
-      : "r" (ptr)
-      : "cc", "memory");
-  return prev;
-}
-
-#endif /* BIONIC_ATOMICS_AARCH64_H */
diff --git a/libc/private/bionic_atomic_gcc_builtin.h b/libc/private/bionic_atomic_gcc_builtin.h
deleted file mode 100644
index 70eb861fe..000000000
--- a/libc/private/bionic_atomic_gcc_builtin.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (C) 2011 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef BIONIC_ATOMIC_GCC_BUILTIN_H
-#define BIONIC_ATOMIC_GCC_BUILTIN_H
-
-/*
- * This header file is used by default if we don't have optimized atomic
- * routines for a given platform. See bionic_atomic_arm.h and
- * bionic_atomic_x86.h for examples.
- *
- * Note that the GCC builtins include barriers that aren't present in
- * the architecture-specific assembler versions.
- */
-
-__ATOMIC_INLINE__ void __bionic_memory_barrier() {
-  __sync_synchronize();
-}
-
-__ATOMIC_INLINE__ int __bionic_cmpxchg(int32_t old_value, int32_t new_value, volatile int32_t* ptr) {
-  /* We must return 0 on success. */
-  return __sync_val_compare_and_swap(ptr, old_value, new_value) != old_value;
-}
-
-__ATOMIC_INLINE__ int32_t __bionic_swap(int32_t new_value, volatile int32_t* ptr) {
-  int32_t old_value;
-  do {
-    old_value = *ptr;
-  } while (__sync_val_compare_and_swap(ptr, old_value, new_value) != old_value);
-  return old_value;
-}
-
-__ATOMIC_INLINE__ int32_t __bionic_atomic_dec(volatile int32_t* ptr) {
-  /* We must return the old value. */
-  return __sync_fetch_and_add(ptr, -1);
-}
-
-#endif /* BIONIC_ATOMIC_GCC_BUILTIN_H */
diff --git a/libc/private/bionic_atomic_inline.h b/libc/private/bionic_atomic_inline.h
deleted file mode 100644
index f8032c34a..000000000
--- a/libc/private/bionic_atomic_inline.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (C) 2010 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef BIONIC_ATOMIC_INLINE_H
-#define BIONIC_ATOMIC_INLINE_H
-
-/*
- * Inline declarations and macros for some special-purpose atomic
- * operations.  These are intended for rare circumstances where a
- * memory barrier needs to be issued inline rather than as a function
- * call.
- *
- * Macros defined in this header:
- *
- * void ANDROID_MEMBAR_FULL()
- *   Full memory barrier.  Provides a compiler reordering barrier, and
- *   on SMP systems emits an appropriate instruction.
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Define __ATOMIC_INLINE__ to control the inlining of all atomics
- * functions declared here. For a slight performance boost, we want
- * all of them to be always_inline
- */
-#define  __ATOMIC_INLINE__  static __inline__ __attribute__((always_inline))
-
-#if defined(__arm__)
-#  include "bionic_atomic_arm.h"
-#elif defined(__aarch64__)
-#  include "bionic_atomic_arm64.h"
-#elif defined(__i386__)
-#  include "bionic_atomic_x86.h"
-#elif defined(__mips__)
-#  include "bionic_atomic_mips.h"
-#else
-#  include "bionic_atomic_gcc_builtin.h"
-#endif
-
-#define ANDROID_MEMBAR_FULL  __bionic_memory_barrier
-
-#ifdef __cplusplus
-} // extern "C"
-#endif
-
-#endif // BIONIC_ATOMIC_INLINE_H
diff --git a/libc/private/bionic_atomic_mips.h b/libc/private/bionic_atomic_mips.h
deleted file mode 100644
index 83f75fe86..000000000
--- a/libc/private/bionic_atomic_mips.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (C) 2011 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef BIONIC_ATOMIC_MIPS_H
-#define BIONIC_ATOMIC_MIPS_H
-
-/* Define a full memory barrier, this is only needed if we build the
- * platform for a multi-core device.
- */
-
-__ATOMIC_INLINE__ void __bionic_memory_barrier() {
-  __asm__ __volatile__ ( "sync" : : : "memory" );
-}
-
-/* Compare-and-swap, without any explicit barriers. Note that this function
- * returns 0 on success, and 1 on failure. The opposite convention is typically
- * used on other platforms.
- */
-__ATOMIC_INLINE__ int __bionic_cmpxchg(int32_t old_value, int32_t new_value, volatile int32_t* ptr) {
-  int32_t prev, status;
-  __asm__ __volatile__ ("1: move %[status], %[new_value]  \n"
-                        "   ll %[prev], 0(%[ptr])         \n"
-                        "   bne %[old_value], %[prev], 2f \n"
-                        "   sc   %[status], 0(%[ptr])     \n"
-                        "   beqz %[status], 1b            \n"
-                        "2:                               \n"
-                        : [prev]"=&r"(prev), [status]"=&r"(status), "+m"(*ptr)
-                        : [new_value]"r"(new_value), [old_value]"r"(old_value), [ptr]"r"(ptr)
-                        : "memory");
-  return prev != old_value;
-}
-
-/* Swap, without any explicit barriers. */
-__ATOMIC_INLINE__ int32_t __bionic_swap(int32_t new_value, volatile int32_t* ptr) {
-  int32_t prev, status;
-  __asm__ __volatile__ ("1:  move %[status], %[new_value] \n"
-                        "    ll %[prev], 0(%[ptr])        \n"
-                        "    sc %[status], 0(%[ptr])      \n"
-                        "    beqz %[status], 1b           \n"
-                        : [prev]"=&r"(prev), [status]"=&r"(status), "+m"(*ptr)
-                        : [ptr]"r"(ptr), [new_value]"r"(new_value)
-                        : "memory");
-  return prev;
-}
-
-/* Atomic decrement, without explicit barriers. */
-__ATOMIC_INLINE__ int32_t __bionic_atomic_dec(volatile int32_t* ptr) {
-  int32_t prev, status;
-  __asm__ __volatile__ ("1:  ll %[prev], 0(%[ptr])        \n"
-                        "    addiu %[status], %[prev], -1 \n"
-                        "    sc   %[status], 0(%[ptr])    \n"
-                        "    beqz %[status], 1b           \n"
-                        : [prev]"=&r" (prev), [status]"=&r"(status), "+m" (*ptr)
-                        : [ptr]"r"(ptr)
-                        : "memory");
-  return prev;
-}
-
-#endif /* BIONIC_ATOMIC_MIPS_H */
diff --git a/libc/private/bionic_atomic_x86.h b/libc/private/bionic_atomic_x86.h
deleted file mode 100644
index e63df9384..000000000
--- a/libc/private/bionic_atomic_x86.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (C) 2011 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef BIONIC_ATOMIC_X86_H
-#define BIONIC_ATOMIC_X86_H
-
-/* Define a full memory barrier, this is only needed if we build the
- * platform for a multi-core device.
- */
-__ATOMIC_INLINE__ void __bionic_memory_barrier() {
-  __asm__ __volatile__ ( "mfence" : : : "memory" );
-}
-
-/* Compare-and-swap, without any explicit barriers. Note that this function
- * returns 0 on success, and 1 on failure. The opposite convention is typically
- * used on other platforms.
- */
-__ATOMIC_INLINE__ int __bionic_cmpxchg(int32_t old_value, int32_t new_value, volatile int32_t* ptr) {
-    int32_t prev;
-    __asm__ __volatile__ ("lock; cmpxchgl %1, %2"
-                          : "=a" (prev)
-                          : "q" (new_value), "m" (*ptr), "0" (old_value)
-                          : "memory");
-    return prev != old_value;
-}
-
-/* Swap, without any explicit barriers. */
-__ATOMIC_INLINE__ int32_t __bionic_swap(int32_t new_value, volatile int32_t *ptr) {
-  __asm__ __volatile__ ("xchgl %1, %0"
-                        : "=r" (new_value)
-                        : "m" (*ptr), "0" (new_value)
-                        : "memory");
-  return new_value;
-}
-
-/* Atomic decrement, without explicit barriers. */
-__ATOMIC_INLINE__ int32_t __bionic_atomic_dec(volatile int32_t* ptr) {
-  int increment = -1;
-  __asm__ __volatile__ ("lock; xaddl %0, %1"
-                        : "+r" (increment), "+m" (*ptr)
-                        : : "memory");
-  /* increment now holds the old value of *ptr */
-  return increment;
-}
-
-#endif /* BIONIC_ATOMIC_X86_H */