Add riscv64 support to the linker relocation benchmark.

Change-Id: I8274826803a07016b9fd08efe60a2f1c77751c5d
Signed-off-by: Mao Han <han_mao@linux.alibaba.com>
Signed-off-by: Xia Lifang <lifang_xia@linux.alibaba.com>
Signed-off-by: Chen Guoyin <chenguoyin.cgy@linux.alibaba.com>
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
Signed-off-by: Lu Xufan <luxufan@iscas.ac.cn>
Test: `mm -j` in bionic/

benchmarks/linker_relocation/include/linker_reloc_bench_asm.h

@@ -42,6 +42,15 @@
 #define DATA_WORD(val) .quad val
 #define MAIN .globl main; main: mov w0, wzr; ret
 
+#elif defined(__riscv)
+
+// No `lga` in clang unless https://reviews.llvm.org/D107278 lands.
+// `la` is equivalent when using PIC (which we do) though.
+#define GOT_RELOC(sym) la a0, sym
+#define CALL(sym) call sym@plt
+#define DATA_WORD(val) .quad val
+#define MAIN .globl main; main: li a0, 0; ret
+
 #elif defined(__i386__)
 
 #define GOT_RELOC(sym) .long sym@got